Wet or Dry Thermal Oxide Silicon Wafers

Wet or Dry Thermal Oxide Silicon Wafers

Wet or dry thermal oxide (SiO2) on silicon wafer is available in the size of 4”, 6” and 12”. Thermal oxide silicon wafer is a bare silicon wafer with silicon oxide layer grown by dry or wet thermal oxidation process. The oxidation in the industry is mainly divided into dry oxygen (pure oxygen oxidation) and wet oxygen (using water vapor as the oxidant). These two oxidations are very similar in structure and performance. High quality oxide layer on the surface of silicon wafer is very important for the whole semiconductor integrated circuit manufacturing process. The thermal growth of silicon oxide is not only used as a masking layer for ion implantation or thermal diffusion, but also as a passivation layer to ensure that the surface of the device is not affected by the surrounding atmosphere.

Description

The thermal oxidation process of silicon is divided into two stages: from linear growth to parabolic growth. In the linear growth stage, oxygen atoms can directly contact silicon to ensure a linear growth thickness of 0.01um. When silicon dioxide (SiO2) adheres to the silicon surface, the remaining part of the oxidation requires diffusion to ensure the contact between silicon atoms and oxygen atoms to form carbon dioxide. At this time, it enters a parabolic growth. Parabolic growth will reduce the production rate of the oxide layer, because sometimes the rate of thermal growth of silicon oxide is accelerated by increasing water vapor.

More about our silicon wafer with thermal oxidation please see below:

1. 12 inch Prime Si Wafer with Thermal Oxide Film

12 inch Prime Si Wafer with Thermal Oxide Film
Item Parameters
Material Monocrystalline Silicon
Grade Prime Grade
Growth Method CZ
Diameter 12″(300.0±0.3mm)
Conductivity type P Type
Dopant Boron
Orientation <100>±0.5°
Thickness 775±25μm 775±25um 650±25μm
Resistivity 1-100Ωcm 1-100Ωcm >10Ωcm
RRV N/A
SEMI STD Notch SEMI STD Notch
Surface Finish Front side finish Mirror Polish
Back side finish Mirror Polish
Edge Rounded Edge Rounded
Per SEMI Standard
The Insulating Thermal Oxidation Film Thickness Oxide Layer Thickness 5000Å on double sides
Particle ≤100counts @0.2μm
Roughness <5Å
TTV <15um
Bow/Warp Bow≤20μm, Warp≤40μm
TIR <5µm
Oxygen Content <2E16/cm3
Carbon Content <2E16/cm3
OISF <50/cm²
STIR (15x15mm) <1.5µm
MCC Lifetime N/A
Surface Metal Contamination
Fe,Zn, Cu,Ni, K,Cr
2E10 atoms/cm2
Dislocation Density SEMI STD
Chips, scratches, bumps, haze, touch marks, orange peel, pits, cracks, dirt, contamination All None
Laser Mark Laser Mark Backside T7. M12

 

2. 6 inch Prime Thermal Oxide Si Wafer

6 inch Prime Si Wafer with Thermal Oxide Film
Item Parameters
Material Monocrystalline Silicon
Grade Prime Grade
Growth Method CZ
Diameter 6″(150±0.3mm)
Conductivity type P Type P Type N Type N Type
Dopant Boron Boron Phosphorus Phosphorus
or Antimony
Orientation <100>±0.5°
Thickness 1,500±25μm 530±15um 700±25μm
1,000±25μm
525±25μm
675±25μm
Resistivity 1-100Ωcm 0-100Ωcm 0.01-0.2Ωcm 0.01-0.2Ωcm
RRV N/A
Primary Flat SEMI STD
Secondary Flat SEMI STD
Surface Finish 1SP, SSP
One-Side-Epi-Ready-Polished,
Back Side Etched
Edge Rounded Edge Rounded
Per SEMI Standard
The Insulating Thermal Oxidation Film Thickness 200A thermal oxide and 1200A LPCVD nitride – stoichiometric
Particle SEMI STD
Roughness SEMI STD
TTV <15um
Bow/Warp <40um
TIR <5µm
Oxygen Content <2E16/cm3
Carbon Content <2E16/cm3
OISF <50/cm²
STIR (15x15mm) <1.5µm
MCC Lifetime N/A
Surface Metal Contamination
Fe,Zn, Cu,Ni, K,Cr
SEMI STD
Dislocation Density SEMI STD
Chips, scratches, bumps, haze, touch marks, orange peel, pits, cracks, dirt, contamination All None
Laser Mark SEMI STD

 

3. 4 inch Thermal Oxide Silicon Wafer

4 inch Prime Si Wafer with Thermal Oxide Layer
Item Parameters
Material Monocrystalline Silicon
Grade Prime Grade
Growth Method CZ
Diameter 50.8±0.3mm, 2″ 100 ±0.3mm, 4″ 76.2±0.3mm, 3″
Conductivity type P Type N Type N Type
Dopant Boron Phosphorus Phosphorus
Orientation <100>±0.5° [100]±0.5° (100)±1°
Thickness 675±20μm 675±20μm 380±20μm
Resistivity ≥10Ωcm ≥10Ωcm 1-20Ωcm
RRV N/A
Primary Flat SEMI STD SEMI STD 22.5±2.5mm, (110)±1°
Secondary Flat SEMI STD SEMI STD SEMI STD
Surface Finish 1SP, SSP
One-Side-Epi-Ready-Polished,
Back Side Etched
1SP, SSP
One Side Polished
Back Side Acid Etched
1SP, SSP
One Side Polished
Back Side Acid Etched
Edge Rounded Edge Rounded Per SEMI Standard Edge Rounded Per SEMI Standard Edge Rounded Per SEMI Standard
The Insulating Thermal Oxidation Film Thickness 100nm or 300nm
Particle SEMI STD
Roughness <5A
TTV <15um
Bow/Warp <40um
TIR <5µm
Oxygen Content <2E16/cm3
Carbon Content <2E16/cm3
OISF <50/cm²
STIR (15x15mm) <1.5µm
MCC Lifetime N/A
Surface Metal Contamination
Fe,Zn, Cu,Ni, K,Cr
≤5E10 atoms/cm2
Dislocation Density 500 max/ cm2
Chips, scratches, bumps, haze, touch marks, orange peel, pits, cracks, dirt, contamination All None
Laser Mark SEMI STD Option Laser Serialized:
Shallow laser
Along The Flat
On The Front Side

 

The thickness of the silicon dioxide layer used in silicon-based devices varies widely, and the main application of thermal oxide growth silicon wafers is according to the SiO2 thickness. For example:

The thermal oxide wafer is used for tunnel gate, when silica thickness on thermal oxide silicon interface is 60~100Å;

When the SiO2 thickness at 150~500Å, thermal oxide (100) wafer is used as gate oxide layer or capacitor dielectric layer;

For the thickness of 200~500Å, silicon oxide wafer is used as LOCOS oxide layer;

When the thickness reaches 2000-5000Å, the thermal oxide Si wafer is used as mask oxide layer and surface passivation layer;

Wet / dry thermal oxide silicon wafers are used as field oxide as the oxide layer reaches 3000~10000Å.

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